Generally, in a portable electronic apparatus such as a personal digital assistant (PDA), a liquid crystal display (LCD), a plasma display panel (PDP), a mobile phone, an MP3 player, a memory, a digital camera, a camcorder, a multimedia player, or the like, circuit components are being gradually miniaturized in response to the trend of the portable electronic devices being miniaturized and multi-functional. Research for the miniaturization thereof is steadily continued recently.
A capacitor among the circuit components is difficult to miniaturize and to be made thin, but recently, a multi-layer chip capacitor, a capacitor whose required capacitance and breakdown voltage are maintained as volume is significantly reduced is being researched and developed.
A principal procedure of manufacturing a multi-layer chip capacitor in a conventional way will be described in a following example.
The multi-layer chip capacitor is manufactured by a mixing process of Wt % or mol % of powder of the main components and a binder of a dielectric layer and an inner electrode layer, a milling process for uniform distribution and miniaturization, a drying process or a printing process carried out for the dielectric layer according to a pattern, a binder drying process carried out after forming the dielectric layer, a spray drying process or a spray printing process carried out for the conductor layer according to the pattern, a binder drying process carried out after forming inner electrodes, a process of repeating the printing process and the drying process for achieving a predetermined capacitance, a sintering process of improving density of particles of a debinder, the dielectric layer, and the conductor layer carried out after achieving the required capacitance, a plating process of processing terminals, a terminal treatment process carried out by plating solution dipping, a soldering process as a post process, and a reliability testing process.
Meanwhile, the multi-layer chip capacitor may be manufactured by photolithography. The method of manufacturing the multi-layer chip capacitor using the photolithography is a method for forming the dielectric layer and a pattern of the inner electrode using the photolithography, and the multi-layer chip capacitor is completed by repeating process of coating a photoresistor, exposure, cleaning, etching, and removing the photoresistor whenever forming respective layers.
A cross-section of the multi-layer chip capacitor manufactured by the conventional method is depicted in FIG. 1.
As shown in FIG. 1, a conventional multi-layer chip capacitor 1 includes inner electrode layers 3 and 4 and a dielectric layer 2, which are alternately formed, and side electrodes 5 and 6 formed at the lateral sides thereof. The side electrodes 5 and 6 must be electrically connected to the inner electrode layers 3 and 4.
According to the conventional method, since the connection between the inner electrode layers 3 and 4 and the side electrodes 5 and 6 is complicated and difficult, a percent of defects caused by connection resistance is increased in the multi-layer chip capacitor whose high frequency characteristics are enhanced when the connection resistance is low. Moreover, since layer delamination is generated due to the expansion of fine bubbles in the layer during the sintering process, the percent of defects is high.
Moreover, in the conventional manufacturing process, since powder of the main components of the dielectric layer and the electrode layer must be nanoparticles, in order to miniaturize the multi-layer chip capacitor, manufacturing costs must be increased, the capacity of a system is reduced due to the complex manufacturing process, a wide installation space is required, and installation costs are increased.
On the other hand, a method of manufacturing the multi-layer chip capacitor by the thin film vacuum vapor deposition is being researched.
However, since the thin film vacuum vapor deposition requires at least two slit patterns for implementing the laminated layer structure of the multi-layer chip capacitor, a shadow mask having the slit pattern to suit every layer must be exchanged whenever forming respective layers. To this end, the vacuum process and the vacuum releasing process that require a relatively long time must be repeated, but since the introduction and mixing of impurities is caused each time the percent of defective products is increased and productivity is deteriorated.